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Working memory load modulation of parieto-frontal connections: evidence from dynamic causal modeling
Authors:Ma Liangsuo  Steinberg Joel L  Hasan Khader M  Narayana Ponnada A  Kramer Larry A  Moeller F Gerard
Institution:Department of Psychiatry and Behavioral Sciences, University of Texas Health Science Center, Houston, Texas 77054, USA. liangsuo.ma@uth.tmc.edu
Abstract:Previous neuroimaging studies have shown that working memory load has marked effects on regional neural activation. However, the mechanism through which working memory load modulates brain connectivity is still unclear. In this study, this issue was addressed using dynamic causal modeling (DCM) based on functional magnetic resonance imaging (fMRI) data. Eighteen normal healthy subjects were scanned while they performed a working memory task with variable memory load, as parameterized by two levels of memory delay and three levels of digit load (number of digits presented in each visual stimulus). Eight regions of interest, i.e., bilateral middle frontal gyrus (MFG), anterior cingulate cortex (ACC), inferior frontal cortex (IFC), and posterior parietal cortex (PPC), were chosen for DCM analyses. Analysis of the behavioral data during the fMRI scan revealed that accuracy decreased as digit load increased. Bayesian inference on model structure indicated that a bilinear DCM in which memory delay was the driving input to bilateral PPC and in which digit load modulated several parieto‐frontal connections was the optimal model. Analysis of model parameters showed that higher digit load enhanced connection from L PPC to L IFC, and lower digit load inhibited connection from R PPC to L ACC. These findings suggest that working memory load modulates brain connectivity in a parieto‐frontal network, and may reflect altered neuronal processes, e.g., information processing or error monitoring, with the change in working memory load. Hum Brain Mapp, 2012. © 2011 Wiley Periodicals, Inc
Keywords:DCM  dynamic causal modeling  effective connectivity  working memory  working memory load  IMT/DMT
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