Low delay rate adaptive pacemaker using FPGA embedded piezoelectric sensor |
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Authors: | Rohini Srivastava Sonali Ray Meenakshi Sharma Nitin Sahai Ravi P. Tewari Basant Kumar |
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Affiliation: | 1. Electronics and Communication Engineering Department, Motilal Nehru National Institute of Technology, Allahabad, India rohini@mnnit.ac.inhttps://orcid.org/0000-0002-3712-6534;3. Electronics and Communication Engineering Department, Motilal Nehru National Institute of Technology, Allahabad, India;4. Bio-Medical Engineering Department, North Eastern Hill University, Shillong, India https://orcid.org/0000-0001-7916-4363;5. Applied Mechanics Department, Motilal Nehru National Institute of Technology, Allahabad, India |
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Abstract: | Abstract This paper presents the hardware implementation of low delay, power-efficient, rate-adaptive dual-chamber pacemaker (RDPM) using a piezoelectric sensor. Rate adaptive pacemaker has the ability to sense the patient’s activity by means of some special sensors and it controls the pacing rate according to the patient’s activity. Ideally, there should be no delay between sensing and the subsequent pacing operation performed by the pacemaker. However, delay in the responses of various components in the circuitry produces an accumulative delay effect in any practical circuit. Physical activity and the physiological needs of the patient can be easily adapted by the rate-responsive pacemakers using a wide range of sensor information. The piezo-electric sensor recognises the pressure on human muscles because of physical activity and converts it to an electrical signal, which is received by the pulse generator of the pacemaker. When the patient is in the rest mode, the heart rate is the only parameter that is to be detected by the pacemaker. Thus, the heart rate and the physical activity both are the inevitable parameters for the design of RDPM. Performance analysis of the proposed RDPM shows a significant reduction in the delay between sensing and pacing. Device utility analysis shows that the proposed design not only requires lesser memory but also reduces the number of components on the chip. Therefore, it becomes very clear that the proposed pacemaker design will consume much lesser power. |
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Keywords: | Rate adaptive pacemaker piezo-electric sensor ECG MIT-BIH Database |
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